Slowing Moore's law and never-ending system demand for multi-functional integration had set a new stage for “advanced packages”, since 2.5D interposer FCBGA with GPU & HBM successfully developed in 2015. Recently “Fan Out Wafer-level Package” started to be adopted by high-end smart phone AP design, for ultra-thin and excellent interconnect performance. This not only inspires packaging industry, but represents an emerging trend from diversified system requirements to converged package platform, after the 15-year packaging renaissance since wafer-bumping & Flip Chip went to mass-market. In the booming Fan-out package trend, the industry is expanding the horizon of “Fan-out Package” to penetrate into mainstream market. This study will start with the fundamental needs & driving forces for Fan-out Package from end-product requirement, package design perspective, as well as interconnect evolution trend, some basic package formats such as single die, die-2-die, package-on-package, and even Fan-out SiP module integration will also be discussed, together with new process challenges from heterogeneous integration. Finally we shall propose further a more “generalized” Fan-Out Package, as building blocks for the new wave of heterogeneous integration!