Pipelined and Delta-Sigma (ΔΣ) ADCs are increasingly becoming popular in mixed-signal system-on-chip (SoCs). This tutorial combines theoretical as well as practical perspectives on ADC design with special focus on two types of ADCs, viz., CT-ΔΣ ADC and pipelined ADC. The goal is to provide a complete picture to the audience, starting from system level architecture to their transistor-level design. The tutorial will cover basics of ΔΣ modulation, both continuous-time (CT) as well as discrete-time, and pipelined ADCs. System-level behavioral modeling using Matlab/Simulink environment will be presented. The top-down design approach will discuss circuit implementation and include circuit non-idealities in the behavioral modeling. Case studies will be presented for CT ΔΣ ADCs and various digital calibration techniques for pipelined ADCs.