Thermal circuit models are based on the analogy between heat transfer and current flow equations. A thermal circuit model is extracted from a solid model of the package assembly by means of a mathematical model order reduction (MOR) algorithm. This algorithm automatically generates a SPICE netlist that can be used with standard analog circuit simulator, for simulation of transient operating conditions and prediction of chip temperatures. MOR is based on the assumption that the movement of a high-dimensional state-vector can be well approximated by a small dimensional subspace. The process of generating the reduced model is fully automated. The time to generate the reduced model is comparable with that of the static solution. Two operating conditions of a multi-channel power switch device in enhanced SOIC package were studied, i.e. uniform power 1W on all channels, and piecewise linear power on one of the channels in the power die. By using MOR, great improvement in computational time can be achieved during transient simulation. Standard finite element models are usually too bulky and require many resources to solve such problems effectively.