In this work, a method has been proposed to generate alphanumeric characters and symbols using FPGA so that the so generated horizontal and vertical deflection signals could be used to activate the CRT for the display of image for HUD application. VERILOG development tools have been used for the generation of various display patterns. Development and simulation of digital data bus corresponding to the X and Y display patterns have been carried out and the digital data is stored, buffered and fed as input to 16 bit digital to analog converter. With assumption of total field of view of HUD as 30 degree circular and HUD origin lying at the lower left corner and with voltage range along x and y axis is −10V to +10V, 16-bit DAC is used to generate 1024 different voltage combinations and the chosen x-y space is divided into 1024 pixel point both in horizontal and vertical directions. A total time to display single character or symbology information is calculated by counting the total data points. The time may increase or decrease depending upon the number of data points used in the lookup table. Therefore, to generate a single character or a sequence of characters or page information, each character or symbology has been calculated and simulated in terms of height, width, shape and orientation of each character.