A variety of hardware security primitives have been developed in recent years, aimed at mitigating issues such as integrated circuit (IC) piracy, counterfeiting, and side-channel analysis. For example, a popular security primitive for mitigating such hardware security vulnerabilities is the physical unclonable function (PUF) which provides hardware specific unique identification based on intrinsic process variations in individual integrated circuit implementations. At the same time, as technology scaling progresses further into the nanometer region, emerging nanoelectronic technologies are becoming viable options for many next-generation computing technologies. At the intersection between nanoelectronics and security, several examples of nano-enabled security primitives have been proposed in the last few years. In this paper, we consider a few examples of nanoelectronic security in the context of how such nanoscale technologies impact power, area and delay as compared to conventional CMOS-based approaches. Our analyses show that leveraging novel nanoelectronic technologies not only provide area benefits but also energy-efficient solutions that enable security with a small footprint.