An on-chip bandpass single-pole-double-throw (SPDT) switch with very compact circuit size is proposed, which is realized using a capacitvely loaded multicoupled line. By sharing the first resonator between the two signal paths and by replacing the quarter-wavelength impedance transformer in conventional designs with a J-inverter, the circuit size can be much reduced. In addition, the capacitive loading can help improve the spurious response such that a very wide upper stopband up to 10f0 can be achieved. Specifically, a third-order bandpass SPDT switch with a center frequency f0 of 5.5 GHz and a bandwidth of about 10% is realized in a commercial GaAs pHEMT process. The measured in-band insertion loss in the on state is better than 4 dB with a 30-dB upper stopband up to 55 GHz. The measured isolation in the off state is better than 30 dB from dc to 55 GHz. The chip size is 1.5 mm×1 mm, which is only about 0.028λ0×0.018λ0 at f0.