This paper presents a design and detailed FFT analysis for CMOS sense amplifiers. Sense amplifiers in association with semiconductor memories are the key elements in defining the overall performance of CMOS memories. The presented design is implemented using C5 process technology using BSIM-4 Spice models. The design includes circuit and operation descriptions, transient signal analysis, FFT analysis, also evaluation of magnitude, phase, and group delay is done at range frequency range from 100 MHz to 10 THz. The paper also presents a physical design and interfacing logic for interfacing CMOS Memory arrays to Sense amplifiers and related control circuits.