Robust clock recovery is essential for optical receivers that can operate over a wide range of data rates. The multi-rate burst-mode DPSK format that is finding applications in NASA’s Laser Communications Relay Demonstration (LCRD) leverages a single optically-preamplified receiver that can maintain nearly theoretical performance for data rates spanning more than two orders of magnitude. Clock recovery of this versatile format needs to function both in low signal-to-noiseratio (SNR) and in high-power regimes, and needs to be able to accommodate a wide variation of rate-dependent peak-to-average powers as well as operation over intermittent fading channels. This can be achieved with traditional analog phase-locked-loop techniques as well as gated approaches that offer lower jitter, which is helpful for stressing low-data-rate applications. This paper presents an overview of clock recovery approaches for multi-rate DPSK receivers, an analysis of expected performance, and measured results.