Microelectronic devices continue to decrease in size, current features reached to 14 nm ARM processor, such as Exynos 7 octa in Samsung electronics. The semiconductor industry requires a deeper understanding of the physical processes involved in CMP to help attain smoother surfaces. In the CMP process, yield efficiency decreases by generating edge exclusion. And slurry cost may contribute to almost half of the total cost of ownership. In this situation, retainer ring can regulate edge exclusion and slurry flow rate. For manufacturing optimal shape of retainer ring, we consider edge exclusion and slurry film thickness. In this study, we focus on the former. In order to research edge exclusion, we perform numerical analysis using ANSYS mechanical which analyzes stress distribution on the wafer. And, after manufacturing prototype, we investigate friction force, temperature and removal rate of wafer in 300 mm wafer scale condition experiment.