In our previous paper [1], we proposed an efficient automatic test generating technique (BBATG) that leverages device behavior descriptions that are widely available for various IC devices (included VLSI). In this paper, we report further improvement on BBATG by leveraging techniques from JTAG (Joint Test Action Group) [2], we call this new technique BJATG. For a device equipped with JTAG, BJATG uses its own BSDL (Boundary Scan Description Language) file to create the device test library automatically. This greatly reduces the overhead to develop device behavior test libraries. Additionally, since JTAG is now available for most of VLSI devices, our technology has a better scalability. Traditional ATE (Automatic Test Equipment) use some type of test instrument bus, such as VXI or PXI Bus to connect to computer. It is usually bulky and requires special handlings. Our ATE leverages standard USB interface to communicate with the host computer, and we call it UATE. In addition to UUT (Unit Under Test) JTAG test interface, UATE has its own built-in JTAG BSC (Bound Scan Cell) chain circuit for UUT's other connector interfaces. With a simple USB structure and optimized interface design, the size of a UATE (not including main computer) is reduced to the size of an iPhone.