The Simulink/Stateflow is a commonly used approach in modeling embedded systems. This paper presents a model driven testing method for embedded systems using Simulink/Stateflow model, where a test model of a system constructed with Simulink/Stateflow is to be converted to hierarchical interface automata. Dependencies within hierarchical interface automata and test sequences are acquired through analyzing model state coverage. And then a solver tool, named Yices, is used to solve linear constraints in test sequences for the purpose of selecting test cases that conform to the constraints. The impact of states of test model is studied using test coverage criteria and the validity of the obtained test cases will also be evaluated.