This paper presents a four-stage cascaded single-stage distributed amplifier (CSSDA) for wideband and low power applications implemented in a 0.13 µm SiGe BiCMOS technology (ft = 300 GHz, fmax = 500 GHz). A 3 dB upper frequency of 180 GHz, a bandwidth of 130 GHz, and a gain of 9.5 dB are measured for the fabricated CSSDA. The circuit requires a chip area of 0.28 mm2 and only 19.5 mW of dc power consumption. To enhance the amplifier gain and bandwidth without increasing the dissipated power, innovative peaking techniques have been employed. Compared against the state of the art, the presented design solution offers the lowest power consumption and the smallest occupied area, without sacrificing excessively speed, gain and gain-bandwidth product.