This paper describes the design and analysis of 3D through-silicon-via (TSV) inductors for integrated sensor applications. On-chip inductors are an integral part of small foot-print RF and analog chips. In an effort to further reduce foot-print, there have been numerous proposals of 3D TSV inductors. However, these inductors do not maintain higher quality factors due to the lossy silicon substrates through which the TSV must pass. We have designed and simulated a new structure to reduce losses through silicon substrates. Our novel structure tunes the inductors using TSV arrays for low-noise amplifiers. Through our simulation results, we were able to maintain a Q factor of approximately 5 on TSV-based inductors with excellent inductor values.