A VCO-based ADC featuring a multi-phase beat frequency based quantization scheme with first order noise shaping is demonstrated in a 65nm CMOS process. The proposed ADC is unique in that it can achieve high resolution (e.g. 6–7 ENOB) for signals with extremely small amplitudes (e.g. <1mV). This allows us to remove or simplify the pre-conditioning amplifiers, reducing power consumption as well as the overall system complexity. The proposed ADC achieves 43dB SNDR for a 1mV input signal while achieving a 10kHz bandwidth and 300kHz sample rate, and consumes 36μW at a 1.2V supply.