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A 6-b 4-Gsps Flash ADC with a pipelined DCVSPG logic encoder implemented in 0.13μm digital process is reported. With ultra-high speed invertor comparators, the clocked DCVSPG encoder with Gray coding lets the ADC achieve 5.4 bits of ENOB at 11.7Mhz input signal and 4-GSPS, 1.1 Ghz of ERBW, 28mW of power consumption with 1.2v power supply, 0.088mm2 of area size, and 0.17pJ/conv. of FoM. The proposed ADC is suitable for SoC applications.
School of Electronic Engineering, University of Electronic Science and Technology of China, No. 2006 Xiyuan Ave. West Hi-Tech Zone, Chengdu, Sichuan 611731 China
School of Electronic Engineering, University of Electronic Science and Technology of China, No. 2006 Xiyuan Ave. West Hi-Tech Zone, Chengdu, Sichuan 611731 China
School of Electronic Engineering, University of Electronic Science and Technology of China, No. 2006 Xiyuan Ave. West Hi-Tech Zone, Chengdu, Sichuan 611731 China
School of Electronic Engineering, University of Electronic Science and Technology of China, No. 2006 Xiyuan Ave. West Hi-Tech Zone, Chengdu, Sichuan 611731 China