Security of the digital systems is under the threat from so called side channel attacks. In particular, Differential Power Analysis (DPA) is a powerful technique, as it does not require any assumption regarding the chip implementation of the device. In this paper, we introduce a novel countermeasure strategy to deal with DPA attacks. This approach is based on randomization methodology of the Dual Mode Logic (DML) family. This logic family basically comprises two modes of operation: static and dynamic modes, each having a different power profile. We design the desired cryptographic module using DML gates while switching randomly between operation modes of these gates. This results in power profile which is much more difficult to estimate, and therefore makes the DPA attack less effective. Simulation results, conducted in a standard 40nm technology, prove the efficiency of the proposed methodology.