This paper presents different, well-known Bussgang algorithms for blind equalization in a real-time environment. The most commonly used Bussgang algorithms based on the constant modulus algorithm (CMA), decision directed modulus algorithm (DDMA) or decision directed algorithm (DDA). They offer different performance concerning convergence rate and steady state mean square error. Utilizing hybrid-algorithms such as stop-and-go (SG), dual-mode (DM) or joint algorithm (JA), an improved convergence rate and steady state mean square error, respectively, can be achieved. In a real-time environment it is reasonable to calculate the bit error rate (BER) in order to evaluate the different algorithms. This work introduces a real-time digital signal processor (DSP) test-bed (C6416T) for developing, testing and optimizing blind equalization algorithms in terms of BER and analysis of computational costs. In this context the number of equalizer taps is one of the limiting boundaries of the baseband communication system and represents a compromise between achievable perfect equalization on the one hand and real-time capabilities on the other hand.