The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A reconfigurable 65nm continuous-time low-pass ΔΣ modulator operates with a sampling frequency from 491 MHz to 1536 MHz, a signal bandwidth from 10MHz to 100 MHz, and a dynamic range of 75.4dB to 62.8 dB, respectively. Reference shuffling in the flash ADC is used to improve the linearity of the flash and DAC, while also increasing the highest sampling rate and bandwidth of the modulator.