The binary-window capacitor switching algorithm is proposed for a binary-weighted capacitor array successive approximation register (SAR) analog-to-digital converter (ADC). It eliminates the middle-code transition glitch to improve ADC linearity. The swapping binary-window (SBW) DAC switching technique, which combines the capacitor swapping and the binary-window switching, further improves both linearity and signal-to-noise ratio (SNR). It can effectively reduce the total capacitance to approach a noise-limited design criterion, achieving better energy-efficiency. The static linearity improvements are shown with the integral non-linearity (INL) reducing by a factor of two due to the utilization of the SBW technique.