In this paper we identify the requirements of a design tool for the implementation of image and video processing algorithms in hardware platforms such as FPGA or ASIC. We discussthe advantages and weaknesses of some existing design languages. Finally, we propose our solution, in compliancewith specified requirements, which intends to bypass the shortcomings of existing languages by providing a high-level of abstraction through two kinds of diagrams; structural diagram and filter edition diagram. It also allows a formal verification and automatic code generation for an ASIC or a FPGA implementation.