Hybrid architectures combined of VLIW, SIMD and multi-core schemes are increasingly prevailing in media processors, due to the abundant parallelism existed in media applications. However, parameters for current combinations such as the VLIW length, SIMD width and core count are set mainly according to simple profiling or the designer's experience rather than a systematic and in-depth investigation. With the development of both the application and the design technologies, a large amount of parallelism, together with better availability of computation resources motivate the need for deeper insight into the trade-offs among VLIW, SIMD and multi-core schemes. In this paper, an analytical model is proposed for these combinational architectures, furthermore, the area cost and cycle time variation are also provided in the form of different design constraints, under which, decent trade-offs are obtained, providing valuable insights into the design of media processors.