A broadband power-reconfigurable distributed amplifier (DA) is presented, where a triple-stack FET structure is employed as a power-adjustable gain cell. The output power is reconfigured by employing double gate-bias control scheme to the bottom and middle FET's, which maintains the efficiency under power back-off without degrading input and output return losses. The DA with eight gain cells is fabricated using a commercial 0.15 µm GaAs pHEMT process. In high power mode, the DA shows output power of 26.7 ∼ 18.3 dBm from 1 to 40 GHz. In the low power mode, the output power is reconfigured to 25.2 ∼ 14.2 dBm with the same input power. The efficiency degradation was less than 2 %. The control scheme can also be switched to analog mode to set continuous output power with minimal efficiency degradation.