Crosstalk among vias is a significant problem in high-speed multilayer printed circuit boards (PCBs), deteriorating signal quality and increasing jitter, especially when circuit density is high. In this paper, a two-step via crosstalk evaluation procedure is proposed. A fast approach for crosstalk estimation is developed for net screening as the first step. Then, more accurate but more time-consuming modeling can be performed for critical nets or the problematic nets identified in the screening. The main contribution of this study includes the analytical prediction of crosstalk among vias based on an infinite parallel-plane assumption. Its effectiveness and efficiency to predict the trends in the crosstalk among vias in practical PCB designs are demonstrated.