Neuromorphic engineering tries to mimic biology in information processing. Address-Event Representation (AER) is a neuromorphic communication protocol for spiking neurons between different layers. AER bio-inspired image sensors are called “retina”. This kind of sensors measurees visual information not based on frames from real life and generates corresponding events. In this paper we provide an alternative, based on cheap FPGA, to these image sensors that takes images provided by an analog video source (video composite signal), digitalizes it and generates AER streams for testing purposes. This design was initially developed for Xilinx Spartan FPGA. In this paper we present a comparison study between synthesis of this design for Xilinx Spartan, Virtex FPGA and Achronix asynchronous FPGA, measuring the maximum performance reached in each case.