In this paper an improved error detection scheme is presented which uses the redundant residue number system (RRNS). Some previous designs were able to correct only a single error, but the integrated approach is able to detect all of the errors in the system. This is one of the advantages of the presented scheme. Some other works also uses Chinese reminder theorem (CRT) to detect and correct errors. This theorem is difficult to implement, so instead of CRT, the presented design uses a high-speed ROM less converter, which is faster and more comfortable to hardware implementation. Thus the speed of novel scheme grows up.