The ongoing shrinkage of semiconductor geometries allows for increasingly higher system-on-chip (SoC) densities, with more and more on-chip processors. As a result, task scheduling has become an important concern in system design and research in this area has produced substantial and diversified knowledge. This paper addresses the issue of how to effectively represent and use this knowledge in the context of design automation tools. A new methodology based on functional concept analysis is presented that structures the available task scheduling knowledge for optimal application to multiprocessor SoC design.