The design flow of a lumped Elements varactor-loaded Transmission-Line phase shifter (VLTL) is illustrated and a 60 GHz phase shifter of this kind is implemented in IBM 90nm CMOS process in this paper. The proposed VLTL is area-saving, occupying only 937um × 110um as it uses inductors instead of long transmission lines. This phase shifter is digitally controlled and need no extra DACs to realize phase tuning range. It is an absolutely passive network and consumes nearly zero DC power. The simulation results verify that this phase shifter can achieve a 180° phase control range with a phase resolution of 22.1°, an insertion loss of 2.5 to 10.9 dB. The return loss |S11|,|S22| are better than 16 dB.