The matrix converter (MC) presents a promising topology that needs to overcome certain barriers (complexity of the modulation and control techniques, protection systems, etc.) in order to gain a foothold in the industry. This article deals with the implementation of the DS SVM vector modulation, commutation and protection of the MC through a series of hardware blocks (cores) integrally implemented in an FPGA. Likewise, given that all the processing capabilities have been integrated in a single chip, it can be said that an FPGA-based System on a Chip (SoC) has been designed.