Employing the method of ramped voltage testing, special capacitor test structures are used for defect density monitoring and time-dependent dielectric breakdown (TDDB) studies. In addition, automated optical inspection (AOI) of the test structures during fabrication allows the mapping of electrical failures back to corresponding visual artifacts. This facilitates the identification of the leading root causes of low capacitor yield and inferior long-term reliability. In the course of these investigations, the metrology space for ramped voltage testing of 50nm capacitors is carefully examined and defined. These studies continue to show that ramped voltage testing is a viable process monitoring methodology which can be easily and effectively realized on-wafer to improve both capacitor yields and long-term reliability.