The developing semiconductor technology enables the reconfigurable hardware such as FPGA. Distributed reconfigurable system is a FPGA-based hardware accelerated system with network. Applications can be accelerated as hardware module by FPGA in a distributed system. There are few works about application mapping on distributed reconfigurable system. In this paper an application mapping scheme for reconfigurable hardware accelerated distributed system is introduced. By extending the link state routing algorithm, this scheme can maintain the network map with low overhead to ensure the flexibility of the algorithm. The LEFM-NH algorithm proposed in this paper analyzes the current network status and the current application task graphs, and then finds appropriate hosts to map tasks to reduce the average network latency. This paper uses NetFPGA as the reference platform. The LEFM-NH algorithm can reduce the average network latency by 64% compared with simple random mapping algorithm. Experimental results show that the LEFM-NH algorithm of our scheme has good scalability and its execution time has a linear growth with task number.