In this paper, we describe the architecture of MipsCoreDuo, a microprocessor which is designed for LSI Design Contest in Okinawa 2009. MipsCoreDuo is a multifunction dual-core processor that has four attractive execution modes. It achieves high-parallel performance, high-sequential performance or high-dependability with single design. We implemented it in Verilog-HDL targeting an FPGA, and evaluated its performance. As a result,MipsCoreDuo uses 5,117 LUTs and achieves 71.8 MHz frequency. And Striping mode, which is one of the execution modes that uses two cores to boost a single-thread program, achieves 8-17% better performance on sequential application than conventional dual-core design.