A 64-channel ASIC called SXDR64 has been developed. The ASIC is aimed to work with DC coupled CdTe and GaAs detectors. Each channel of ASIC consists of charge sensitive amplifier, pole-zero cancellation circuit, 4th order shaper with programmable gain and peaking time from 115 ns to 380 ns, base-line restorer, two independent discriminators and two 20-bit counters. The IC control and readout of the data are done via LVDS drivers/receivers. Circuit can operate with input leakage currents in the range from -5 nA up to 10 nA and the frequency of input pulses up to 1 MHz. Simulated equivalent noise charge of the front-end electronics for 3 pF detector capacitance, detector leakage current of 500 pA and peaking time Tp = 380 ns is 123 electrons rms. The ASIC is designed in CMOS 0.35 mum technology and its total area is 4800 times 5000 mum2.