The implementation of safety critical applications in internal vehicles requires a reliable wireline communication system to ensure enough bus line signal integrity. The design verification of in-vehicle electronic embedded system during the early stages of the system design is required and can be effectively achieved through behavioral simulations. The main difficulty is on modelling the mixed-mode communication interface, e.g. the transceiver, because it is a mixed-mode circuit. This paper introduces the mixed-mode behavioral model of Flexray physical layer transceiver and it presents the behavioral model verification. Several simulations were performed in order to demonstrate the effectiveness of the proposed model, regarding signal integrity, model behavior in different bus states, wake-up pattern detection, receiver sensibility and the timing characteristics. The performance was evaluated by comparing the CPU usage time of the model (implemented in VHDL-AMS) with Spectre simulations. The VHDL-AMS model was clearly faster than Spectre and it is fully compliant with the Flexray standard specifications.