This paper presents a high throughput, VLSI architecture for multi-standard in-loop deblocking filter (ILF) supporting H.264 BP/MP/HP, AVS, and VC-1 video decoding. It comprises 38.4 Kgates and 672 bytes of local memory using TSMC 0.13 mum CMOS technology when operating at 225 MHz which meets the real-time processing requirement for high-resolution video decoding. We develop a PDB scheme and an integrated 1-D filter to realize various coding tools of the deblocking filter supporting multiple video coding standards.