An array of accelerated temperature cycling (ATC) finite element (FE) simulations using ANSYStrade, and drop-impact finite element simulations using LS DYNAtrade, are used to find the optimum elastic modulus and coefficient of thermal expansion (CTE) for a stacked chip scale package. For the ATC simulations, Anand's constitutive model with properties for Sn96.5Ag3.0Cu0.5 (SAC305) and tin-lead eutectic (Sn63Pb37) are used for the solder joint. The strain energy density is used as a damage parameter to determine the number of thermal cycles to failure. Tri-linear elastic-plastic models are used for the solder joint properties in the drop-impact simulations. The maximum normal stress in the solder joints is used as damage parameter for the drop-impact simulations. Simulations show that the optimum underfill material has an elastic modulus of 2 GPa and a CTE of 25 ppm/K.