In contrast to what is generally assumed, the evolution of fT beyond the 45 nm CMOS generation may not be able to follow the ITRS roadmap. Moreover, the gap between intrinsic device and circuit performance is expected to increase with new generations, due to an increase in interconnect parasitic capacitance in the transistor pcell area. Such problems are not expected for SiGe processes. The move to higher frequencies for new applications leads to a shift in system partitioning, since the receiver front-end must be located physically close to the antenna. Emerging mm-Wave applications such as radar and high data-rate wireless need to apply beam-forming which can be realized at low cost using phased arrays. These RF requirements justify a 2-chip solution: one analog phased array front-end plus one digital SoC. RF signal distribution on chip will be a determining factor in the choice of technology. For this reason, SiGe is and will remain leading over CMOS for mm-Wave.