LGA sockets are becoming the leading technology to connect the micro-processors with the system boards of desktop or server computers. It is critical to understand the mechanical behavior of a socket to predict its required enabling load and reliability to certain confidence at the design phase. FEA has been used to achieve this goal at both component and system levels. This paper presents a sensitivity study of socket J- lead compliances to the J-lead geometry and element types used to model the J-lead. A methodology to simplify the J-lead structure using binary DOE and optimization is proposed for significant DOF reduction while maintaining the J-lead compliances to be within 10% error. The simplified socket component was later used to develop the complete detailed system model including the socket housing, LGA contact, system board, backing plate and the package with different loading conditions. This model was employed to investigate the interaction between the package and the socket, as well as the package deformation and socket BGA forces under different enabled conditions.