Single-carrier (SC) transmission using frequency domain equalization (FDE) based on the minimum mean square error (MMSE) criterion is an efficient way to combat the effects of frequency selective fading. In this paper, we discuss several key aspects concerning the implementation of a frequency domain equalizer and propose a feasible design. One of the problems is the implementation of the division operator used to compute the equalization weights. The CORDIC algorithm was employed for this as it reduces the hardware overhead. The proposed design was implemented in a FPGA and the performance was evaluated through experimental data.