Efficient modulo 2<sup>n</sup> + 1 multi-operand adders

H.T. Vergos; D. Bakalis; C. Efstathiou

doi:10.1109/ICECS.2008.4674948

Efficient modulo 2ⁿ + 1 multi-operand adders

Vergos, H.T., Bakalis, D., Efstathiou, C.

Source

2008 15th IEEE International Conference on Electronics, Circuits and Systems > 694 - 697

Abstract

A new architecture for modulo 2ⁿ+1 multi-operand addition (MOMA) of weighted operands is introduced. It is based on the use of a translator circuit that enables to use n-bit operations for performing the weighted multi-operand addition. Our experimental results indicate that the proposed MOMAs offer significant savings in execution time compared to the previously proposed solutions that either require two parallel additions or a carry-save adder tree with twice the depth of the proposed while they can be implemented in less area in most cases.