In this paper, the simulation of via interconnects in multilayered printed circuit boards (PCBs) and packages combining physics-based via models and microwave network theory will be discussed. The description of the via in terms of network parameters, partitioning of the system, and combination of partial results will be addressed. Two alternatives to combine the results are compared, namely multiplication of ABCD matrices and the segmentation method based on S-parameters. The goal of this work is to develop a fast and accurate modeling strategy for via arrays in the multi-gigabit range, extensible to an arbitrary number of elements, and suitable for automation and design optimization. The obtained results show good agreement with respect to 3D electromagnetic field simulations and measurements up to 20 GHz. Hence, this approach is a promising technique for efficient system-level simulation of interconnects.