The post STI liner oxide annealing effect for 0.14um embedded flash has been investigated. It is known that STI module is critical process for Vddmin test of logic device. To resolve Vddmin sensitivity, the various experiments have been performed in embedded flash product. Due to complexity of embedded flash product and unique flash operation , the STI etch process has not been considered, which may cause serious flash yield loss. In this paper, it has been known that the post STI liner oxide anneal process plays a role as key process parameters to minimize the Vddmin failure. Besides, it is also proposed it is necessary to find optimum process conditions to maintain stable yield for embedded flash.