Since scan testing is not based on the function of the circuit, but rather its structure, this method is considered to be a form of over testing or under testing. It is important to test VLSIs using the given function. Since the functional specifications are described explicitly in the FSMs, high test quality is expected by performing logical testing and timing testing. This paper proposes two test generation methods, a fault-independent test generation method and a fault-dependent test generation method, for state-observable FSMs. We give experimental results for MCNC'91 benchmark circuits. The quality and cost of the logic testing and timing testing for proposed test generation methods was evaluated.