Data acquisition on the ISTTOK tokamak is being upgraded from VME to PCI using a general purpose especially developed PCI acquisition board with 8 galvanic isolated channels and 14bit/2Msamples/sec 512 Mbytes of SDRAM, and integrated FPGA/DSP capabilities. Due to the wide range of signal spectrum present in the experimental device data-reduction is crucial to efficiently use data retrieval and analysis systems. To avoid long latency offline processing and also to allow real-time control implemented in the DSP, multi-rate real time decimation in the FPGA has been implemented. This paper describes the data processing techniques developed using either FIR or cascaded- integrator-comb CIC filter comparing both approaches. The digital DC baseline restorer was also implemented in the FPGA.