In this paper a 13b incremental A/D converter for high-linearity sensors read-out applications is described and characterized. The incremental solution is preferred to traditional SigmaDelta architectures to simplify the decimator filter topology, which is actually a single bit digital accumulator. This leads to lower area occupancy and power consumption. The input signal, which can be connected either in single-ended or differential mode, is sampled by a resettable SC integrator, followed by a discrete time comparator, which selects the feedback signal. The silicon prototype has been designed in 0.35mum technology with a power supply of 3.3V and consumes 950muW with throughput rate of 120Hz. The measurements results show an ENOB of 12.41 bits. The chip area is 0.22mm2.