In this paper, hot-electron degradation in deep submicrometer MOSFETs at 3.3V and below is studied. Using a device with Leff = 0.1?m and TOX = 75?, substrate current is measured at a drain bias as low as 0.7V; gate current is measured at a drain bias as low as 1.75V. Using the charge-pumping technique, hot-electron degradation is also observed at drain biases as low as 1.8V. These voltages are believed to be the lowest reported values for which hot-electron currents and degradation have been directiy observed. These low-voltage hot-electron phenomena exhibit similar behavior to hot-electron effects present at higher biases and longer channel lengths. No critical voltage for hot-electron effects (such as the Si-SiO2 barrier height) is apparent. Established hot-electron degradation concepts and models are shown to be applicable in the low-voltage deep submicrometer regime. Using these established models, the maximum allowable power supply voltage to insure a 10-year device lifetime without using LDD is determined as a function of channel length (down to 0.1?m) and oxide thickness.