This paper describes a low power and high performance camera signal processor system-on-a-chip (SoC) architecture for mobile camera applications such as the mobile phone, the personal digital assistant (PDA), and the personal multimedia player (PMP). In this work, we presented the use of the gated clock approach to reduce power consumption. The area of this chip is 2.8 mm times 2.7 mm and it was fabricated with the 0.18-mum CMOS process. This device packaged with flash memory in a multi-chip package (MCP) technology and dissipates 76 mW at 1.8 V/50 MHz.