This paper describes TSNWFET devices with embedded Si1-xGex source/drain regions and different nanowire orientations. Thick Si1-xGex embedded source/drain and lang110rang channel orientation is found effective to enhance p-channel TSNWFET performance, while cause degradation for n-channel one. Thin Si1-xGex and lang100rang channel orientation is the preferred combination for keeping n-TSNWFET performance. With lang110rang channel orientation and thick Si1-xGex in source/drain, p-MOS current, for the first time, is even observed to exceed its n-type counterpart from the experiments