Thermal-aware placement problem, which had received only moderate interest in the past, is gradually becoming a "hot spot" in EDA. Essentially, it shows a nonuniform temperature distribution problem caused by the growing power consumption in modern high performance VLSI circuit designs. In this paper, in order to effectively decrease the maximal temperature on the die and lead to a comparatively uniform temperature distribution, we present a thermal placement algorithm for standard cell based layout: a Fiduccia-Mattheyses (FM) partition scheme proceeds; During each partition level the corresponding thermal quadratic programming problems are constructed and Lagrangian relaxation approach is used to solve them. The experimental results demonstrate our algorithm's effectiveness