The design of a CMOS ultra-wideband (UWB) receiver front-end for high data rate, short-range wireless communications is presented. Targeted for the MB-OFDM UWB standard proposal, the receiver front-end uses a direct-conversion architecture and integrates a wideband low-noise amplifier (LNA) and two double-balanced mixers for quadrature downconversion. Designed in a 0.13-mum CMOS technology and housed in a low-cost LPCC package, the prototype chip delivers 22.9-26.4 dB of power gain and 4.8-7.7 dB of double-sideband noise figure over the entire 3.1-10.6 GHz UWB band. An input third-order intercept point (IIP3) of -11.5 dBm ensures a linear receiver. Operating from a 1.5-V supply, the UWB receiver frontend draws 32 mA dc current