The emitter stripe width scaling issues for power SiGe HBTs are fully investigated in this work. Both theoretical and experimental results show that the fmax of power SiGe HBTs heavily depends on the emitter stripe width. Different from high speed device design principle, downscale of emitter stripe width is not always valid to improve the performance of power devices due to the presence of significant interconnect resistance. Instead, an optimal emitter stripe width exists, which is decided by both base sheet resistance and total emitter area. Employing a high base doping concentration and with "optimal" emitter stripe width design, the state-of-the-art power SiGe HBTs were successfully developed